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Job Description
Power Architect
London or EU Locations
Flexible Package depending on profile.
If you are considering sending an application, make sure to hit the apply button below after reading through the entire description.
My client is a cutting-edge technology company specializing in GPU design and innovation. Their team is comprised of some of the brightest minds in the industry, dedicated to pushing the boundaries of what's possible in low-power ASIC design.
Responsibilities:
- Lead power modeling and analysis efforts for GPU products across various product lines and nodes
- Optimize power bins and develop TensorFlow models for accurate power estimation
- Collaborate with pre- and post-silicon teams to ensure seamless chip integration
- Apply compiler engineering expertise to enhance power architecture and drive innovation
- Mentor and guide junior team members in power analysis and optimization techniques.
Requirements:
- Master's or Ph.D. in Electrical Engineering, Computer Engineering, or a related field
- 8+ years of experience in power architecture, modeling, and analysis for complex SoCs, preferably GPUs
- Strong background in IC design, with expertise in RTL/netlist power simulations and clock tree analysis
- Proficiency in power optimization techniques, power bin optimization, and TensorFlow modeling
- Experience in compiler engineering and its application to power architecture
- Excellent problem-solving, communication, and leadership skills
- Ability to work collaboratively in a fast-paced, dynamic environment
Preferred Qualifications:
- Experience with industry-standard power analysis tools and methodologies
- Knowledge of advanced process nodes and their impact on power consumption
- Familiarity with machine learning techniques for power optimization
- Track record of successful power architecture implementations in high-volume products
- Publications or patents in the field of power analysis and optimization