Senior Hardware Design Methodology Engineer Job In Cambridge

Senior Hardware Design Methodology Engineer - ARM
  • Cambridge, Other, United Kingdom
  • via Test Feed 1
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Job Description

Job Overview:Are you passionate about setting new standards in hardware design and physical implementation? We have a phenomenal opportunity in the Advanced Technology Team (ATD) of the Productivity Engineering (PE) Group!You will conduct investigations involving new tools, flows, methodologies and standards such that we make physical implementation of Arm CPU, GPU, Systems and ML Hardware IP products more effective. We will include the results of your investigations into the Arm Hardware Methodology Roadmap.We offer a role with high potential for development - both technically but also with collaboration and leadership skills! Prior experience in hardware design and physical implementation on IP or tapeout projects is expected.Responsibilities:Defining scope and value of investigationsConducting investigations relying on your hardware design and physical implementation expertise. That will often involve doing practical experiments/proofs of concept, possibly developing a Minimum Viable ProductHelping maintain specific standardized solutionsCollaborating with EDA partners to experiment with their solutionsCollaborating with the engineering community to seek feedback and transition investigations from Proof of Concept to MVPContributing to the leadership of the ATD teamRequired Skills and Experience :Hardware description languages (e.g. Verilog RTL design).Previous experience with synthesis of RTL into a gate level netlistProven programming and scripting skillsExpressing new insights and communicating them effectivelyThe ability to develop for others, taking on board external perspectives“Nice To Have” Skills and Experience :Clock and reset designLayout of a gate level netlist to GDS2Working with Arm based SoCs, large SoCs or advanced CPU/GPU designsDevOps/SW related experience with building automation around physical implementation practicesDeploying a new methodology onto a projectWorking with multiple EDA providers  LH-LB 5

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